A single cabinet supports up to 128 cards, with configurations ranging from 32 to 1,024 cards and scalability up to 16,384 cards. Achieving a PUE as low as 1.04, it underpins the development of national- and industry-level intelligent computing centers.
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An SoC platform designed for edge AI applications enables customers to reduce BOM costs by 39% and shorten development cycles by 67%, thereby strengthening the global competitiveness of China's edge AI chips.
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Targeting three core systems—satellite information processing, attitude control, and health management—and leveraging full-link hardening technology, this solution ensures highly reliable operation in the extreme environment of space.
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Pioneering a 3.5D heterogeneous integration solution that delivers a memory bandwidth of 30 TB/s and reduces PNM near-memory computing access latency by up to 18 times, thereby enhancing AI computing efficiency.
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GT-Link supports interconnection of over 1,000 cards with a latency of 300 nanoseconds; the GT switching chip roadmap covers capacities from 2T to 102.4T, increasing MFU from 30% to 80%.
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Leveraging a foundation of over 1,000 chip models, 10,000 engineers, more than 100 proprietary IPs, and accumulated mass production data, RTL generation and optimization efficiency has been improved by 120 times, while R&D investment per chip has been reduced by 50%.
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The world's first on-orbit verification of L-band and S-band 5G NTN technologies, along with China's first field tests for 5G NTN direct-to-cell satellite connectivity and IoT services, have been successfully completed, accelerating the deployment of direct-to-cell satellite communications and satellite IoT applications.
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Launched the internationally leading 3D heterogeneous integration embedded DRAM (SeDRAM) technology, which is widely applied in fields such as artificial intelligence, big data processing, and high-performance computing.
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Launched the first domestically developed high-performance automotive-grade control chip, which is also China's first powertrain domain control chip. It achieves an ASIL-D functional safety rating and has completed the country's first one-million-kilometer real-vehicle road test.
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The first domestic enterprise to overcome the bottleneck in the independent development of 100-million-gate high-performance FPGA devices, mastering key technologies including hardware design, testing, packaging, reliability assurance, and the research and development of FPGA development tools for 100-million-gate high-performance FPGA chips.
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