Source: Pango Microsystems |Original Link
On March 24, the XuanTie RISC-V Ecosystem Conference, an annual industry event hosted by DAMO Academy, attracted a substantial number of attendees. At a section of the main forum exhibition area, the ALINX AXPGL50 development board—a domestic product based on Pango Microsystems FPGA—drew significant attention from participants. Equipped with the XuanTie E901 processor, this FPGA development platform features a refined core board and expansion board design, demonstrating the flexibility and potential of the RISC-V architecture in embedded applications.
What is RISC-V, and how can it break the monopoly held by x86 and Arm?
Developers following the chip industry have likely observed frequent references to "RISC-V" and "XuanTie C950" recently. In the global landscape of chip instruction set architectures, x86 dominated the PC era, while Arm leads the mobile era. Despite their capabilities, both are proprietary. In contrast, RISC-V is open-source, streamlined, modular, and universal, making it applicable to all chip types, including FPGAs and ASICs. For an extended period, industry perception of RISC-V was confined to low-power embedded and IoT applications; however, this paradigm is being fundamentally transformed as RISC-V technology expands into traditional high-performance computing and artificial intelligence. At the conference, Ni Guangnan, Academician of the Chinese Academy of Engineering, stated: "RISC-V's share of the global chip market has exceeded 25%, and the duopoly of x86 and Arm is beginning to dissolve." Similar to the significance of Linux in the operating system domain, RISC-V substantially lowers barriers to chip design and significantly accelerates innovation.
ALINX AXPGL50: Pango Microsystems Logos FPGA Integrated with XuanTie E901 Processor
The AXPGL50 development board exhibited by ALINX is built upon the Pango Microsystems Logos PGL50H FPGA chip and integrates the XuanTie E901 processor. Designed for extreme efficiency, the XuanTie E901 utilizes the RV32E architecture with a two-stage pipeline. Fabricated using a 40nm process, its minimum configuration requires only 10.7K gates, representing a 39% area optimization compared to previous-generation cores of similar class. Through deep low-power optimization, the E901 achieves a 48% improvement in energy efficiency per unit and a 48% reduction in dynamic power consumption, delivering performance metrics of 1.22 DMIPS/MHz and 2.88 CoreMark/MHz. Even within an extremely low power budget, it provides reliable control and computing capabilities, making it particularly suitable for embedded applications sensitive to power consumption, area, and cost. The Pango Microsystems Logos PGL50H FPGA chip employs a 40nm CMOS process and a new LUT5 architecture, integrating abundant on-chip resources and I/O interfaces—including RAM, DSP, SerDes, and DDR3—to offer low power consumption and low cost. It provides customers with a cost-effective solution ideal for industrial control and image/video processing applications. The AXPGL50 adopts a core board (P50) plus expansion board kit design, configured with 1GB DDR3 and 16MB QSPI Flash, alongside HDMI output, Gigabit Ethernet, USB, camera interface, JTAG debugging interface, and a 40-pin expansion header. It is applicable to scenarios such as industrial control, security surveillance, machine vision, and communication baseband processing. Users can directly utilize the pre-installed E901 processor system to focus on peripheral driver and upper-layer application development, while advanced developers can leverage FPGA programmability for cutting-edge exploration, including processor prototyping, custom instruction set design, and hardware algorithm acceleration.
Openness and Connectivity: Co-creating the Future
Krste Asanovic, Chief Architect of RISC-V International, once stated: "The success of RISC-V stems from its openness." This openness connects developers worldwide and accelerates the creation of a superior technological future. Adhering to the philosophy of openness and connectivity, the RISC-V ecosystem is expanding at an unprecedented pace. The debut of the ALINX AXPGL50 development board at the XuanTie RISC-V Ecosystem Conference represents a part of this momentum, enabling every developer to engage directly with RISC-V technology and define their own future through maximum flexibility.